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Re: DSP extern memory extra cycles
Posted by: Sallafranque Jan,06.2012-01:32 

Hi,

Thanks a lot for your 2 answears.
This confirms what I understood about this external memory access.

I did some coding about cycles in the DSP code, but I missed this special point (multi extra access to external memory cost a 1 cycles waitstate after the first access).

It'll be quite easy to add this to Hatari now, I'll do it soon.

> And don't forget, some addressing modes ((r0)-,IIRC, for example) add additional cycle!

I've already implemented the special EA extra cycles into the dsp code of hatari.


I still have 3 little questions on this subject, just to be sure everything is understood :


1) In the table A-14 page A-232 of the DSP56001UM-A3 pdf, I can read the following accesses : L: XY: declined for
INT, INT
INT, EXT
EXT, INT
EXT, EXT

Is it only a typo in the doc (I thought that a L:access could only concern INT,INT or EXT,EXT access, as the same address is used for both X: and Y: access).
I'm OK for X or Y (upper address can be INT and lower address can be EXT for example)

Am I wrong ?



2) let's have a look at the move reg1,X:adr1 reg2,Y:adr2 instruction.

Let's consider adr1 and adr2 are exernal memory access.

According to the Table A-7, a X:Y: access is ea+axy cycles.
According to the Table A-14, axy is 2 + wx + wy cycles.

Our memory is 0 waitstate, but because of the bus, writing to X and then Y will cost 1 Waitstate.

So this instruction will execute in move cycles + ea cycles + 2 + 1 ?



3) Let's have a look at JMP (Table A-11)

According to the doc, "All one-word jump instructions execute TWO program memory fetches to refill the pipe-line, which is represented by the ‘‘+(2 ∗ ap)’’ term."

A JMP is 4 + JX cycles
Jx is ea + (2*AP) cycles
AP = 0 if internal memory or wp if external memory (0 waitstate for us)

Let's say our JMP istruction is located in P internal memory at address $50
and R2 is in internal memory too.

$50 JMP R2

The total cycles is 4


Now, let's say the JMP is in P external memory and R2 is also in external memory.

The total cycles should be :
4 (jmp) + 0 (ea) + 2*0 (ap) ?
or
4 (jmp) + 0 (ea) + 2*0 (ap) + 2 (3 external access to memory - 1) ?


Thanks for your patience,

Regards

Laurent








[All messages in this thread]    [Start new thread]

Topic Posted by  Date 
DSP extern memory extra cycles Sallafranque Jan,03.2012-19:25
  Re: DSP extern memory extra cycles Patrice Mandin Jan,04.2012-22:57
    Re: DSP extern memory extra cycles mikro Jan,05.2012-08:49
      Re: DSP extern memory extra cycles Sallafranque Jan,06.2012-01:32
        Re: DSP extern memory extra cycles mikro Jan,06.2012-13:52


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