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Re: DSP memorymap problem
Posted by: ggn Jun,27.2018-14:31 

So wait, your test has both table1 and table 2 in y ram? So, something like

do #120,l1
do #160,l2

add y0,a
:
:

move a,y:(r0)+
move a,y:(r1)+

l1 nop
l2 nop

:
:

org y:$200
table1 ds 120*160

org y:$200
table2 ds 120*160



If that's what you do my guess would be that the tables alias. I'm not sure it's a great idea to write to the same address in 2 consecutive cycles!

I could be totally wrong here too but just wanted to mention this.




[All messages in this thread]

Topic Posted by  Date 
DSP memorymap problem Emphii Jun,26.2018-21:56
  Re: DSP memorymap problem Emphii Jun,26.2018-21:58
    Re: DSP memorymap problem mikro Jun,27.2018-10:24
      Re: DSP memorymap problem Emphii Jun,27.2018-11:25
  Re: DSP memorymap problem tat Jun,27.2018-12:25
  Re: DSP memorymap problem ggn Jun,27.2018-14:31
  Re: DSP memorymap problem insane/tscc Jun,27.2018-15:16
    Re: DSP memorymap problem Emphii Jun,27.2018-23:27
      Re: DSP memorymap problem tat Jun,29.2018-15:35
        Re: DSP memorymap problem Emphii Jul,03.2018-20:14
          Re: DSP memorymap problem Daniel / New Beat Jul,05.2018-00:07
            Re: DSP memorymap problem Emphii Jul,05.2018-14:22
              Re: DSP memorymap problem mikro Jul,06.2018-08:15
          Re: DSP memorymap problem mikro Jul,06.2018-08:17
            Re: DSP memorymap problem Emphii Jul,12.2018-23:09


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