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Re: mega ste & sommerhack stuff
Posted by: Paranoid / pdx Jul,08.2010-18:17 


I am pretty sure bus arbitration is different. It's not just the 68000's timing requirements that need to
be met but the cache's ones. I guess the 4 additional cycles are being applied generally for all bus
masters when they request the bus to make sure the cache can finish its access, but that's just a guess.

All my attempts to collect any reliable data about the cache inside the MegaSTE failed so far ...
It seems a bit like Atari implemented a proprietary solution, much like in their MegaSTE-specific
internal SCSI hostadapter ...


The Paranoid / Paradox








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Topic Posted by  Date 
mega ste & sommerhack stuff mikro Jul,05.2010-23:25
  Re: mega ste & sommerhack stuff 505 Jul,06.2010-00:43
    Re: mega ste & sommerhack stuff ggn Jul,06.2010-08:42
      Re: mega ste & sommerhack stuff saulot Jul,06.2010-09:05
        Re: mega ste & sommerhack stuff Paranoid / pdx Jul,06.2010-10:18
    Re: mega ste & sommerhack stuff Felice Jul,10.2010-13:02
  Re: mega ste & sommerhack stuff evil Jul,06.2010-10:19
    Re: mega ste & sommerhack stuff bear Jul,07.2010-19:00
      Re: mega ste & sommerhack stuff tobe Jul,07.2010-19:36
        Re: mega ste & sommerhack stuff Paranoid / pdx Jul,08.2010-18:17
          Re: mega ste & sommerhack stuff tobe Jul,08.2010-18:20
            Re: mega ste & sommerhack stuff Paranoid / pdx Jul,09.2010-12:38
              Re: mega ste & sommerhack stuff tobe Jul,11.2010-14:23
                Re: mega ste & sommerhack stuff Felice Jul,11.2010-18:11
                  Re: mega ste & sommerhack stuff Per Almered (XiA) Jul,11.2010-22:26
                    Re: mega ste & sommerhack stuff mikro Jul,16.2010-08:52
                      Re: mega ste & sommerhack stuff Strider Jul,17.2010-08:25
                        Re: mega ste & sommerhack stuff Soph Nov,28.2012-20:23


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