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CT60 and related things BBS
| Re: 100 MHz.. nearly. |
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Posted by: hencox
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Nov,10.2003-10:02
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Hi!
CL2 means "CAS latency equals 2 clockcycles". This is the amount of time (2 clockcycles = 15ns at 133MHz) that has to pass after the column adress has been sent to the SDRAM prior to getting any data from it. At least I think it's something like this. :)
CL3 is obviously a latency of 3 cycles, which is 3/2 as much time as 2 cycles (22.5ns)... :)
If an SDRAM module labeled as 133MHz CL2 is run at 66MHz instead, only 1 66MHz clockcycle would actually be needed (1 clockcycle = 15ns at 66MHz).
/Henrik
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[All messages in this thread] [Start new thread]
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Topic
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Posted by
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Date
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100 MHz.. nearly.
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evil
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Nov,08.2003-16:02
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Re: 100 MHz.. nearly.
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Anonymous
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Nov,08.2003-16:26
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Re: 100 MHz.. nearly.
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evil
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Nov,08.2003-18:37
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Re: 100 MHz.. nearly.
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Didier Méquignon
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Nov,09.2003-12:48
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Re: 100 MHz.. nearly.
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evil
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Nov,09.2003-17:07
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Re: 100 MHz.. nearly.
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Philipp Donzé
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Nov,09.2003-18:29
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Re: 100 MHz.. nearly.
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hencox
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Nov,10.2003-10:02
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Re: 100 MHz.. nearly.
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hencox
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Nov,10.2003-10:04
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Re: CL2/CL3
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Ragstaff
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Nov,11.2003-08:00
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Re: CL2/CL3
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hencox
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Nov,11.2003-11:12
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Re: CL2/CL3
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stimpy
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Nov,14.2003-14:03
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Re: 100 MHz.. nearly.
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Peter
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Nov,10.2003-16:19
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Re: 100 MHz.. nearly.
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evil
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Nov,10.2003-20:25
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Re: 100 MHz.. nearly.
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Peter
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Nov,11.2003-09:56
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Re: 100 MHz.. nearly.
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SWE
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Nov,11.2003-21:40
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Re: 100 MHz.. nearly.
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Didier Méquignon
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Nov,11.2003-22:04
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Re: 100 MHz.. nearly.
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Thomas / New Beat
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Nov,12.2003-12:25
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Re: 100 MHz.. nearly.
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SWE
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Nov,12.2003-21:00
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Re: 100 MHz.. nearly.
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Didier Méquignon
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Nov,14.2003-22:00
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What's the anti-troll code?
That's your personal code to be able to add comments and messages on the dhs.nu site.
Don't have a code or forgot it? Fix it here.
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