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CT60 and related things BBS
| CT60 archive 0.99f |
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Posted by: Didier Méquignon
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Nov,09.2003-12:54
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I have updated the TOS archive.
A bug inside the CPX for change the TLV offset is fixed (french only was OK).
Now there are better informations about the SDRAM who replace hex values with the right shift during boot, and now inside the CPX !
Inside the CPX select 'i' and 'SDRAM'.
The doc is updated.
Regards,
Didier.
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