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Re: CTPCI and 33 MHz boards
Posted by: Didier Méquignon Jun,28.2010-16:54 

It's a good idea, but I think that only the local PLX clock use the CPLD (CT60 clock / 2), for the PCI clock there are an oscillator (near the 4 pins power CT60 connector).
Yes, normally decrase clock must fix parity errors.

Didier.







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Topic Posted by  Date 
CTPCI and 33 MHz boards Didier Méquignon Jun,28.2010-08:45
  Re: CTPCI and 33 MHz boards Didier Méquignon Jun,28.2010-14:00
  Re: CTPCI and 33 MHz boards Joe Iron Jun,28.2010-15:06
    Re: CTPCI and 33 MHz boards Didier Méquignon Jun,28.2010-16:54
    Re: CTPCI and 33 MHz boards Didier Méquignon Jun,29.2010-13:18
      Re: CTPCI and 33 MHz boards Joe Iron Jun,29.2010-19:14
    Re: CTPCI and 33 MHz boards Didier Méquignon Jun,29.2010-19:28
      Re: CTPCI and 33 MHz boards Joe Iron Jun,29.2010-20:56
        Re: CTPCI and 33 MHz boards Didier Méquignon Jun,30.2010-12:51
        Re: CTPCI and 33 MHz boards Didier Méquignon Jul,03.2010-21:20


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