Search site Dead Hackers Society
Other BBSes »

Outline 2019

Sommarhack 2019
Demoscene   º   Coding   º   CT60   º   Buy/sell   º   Misc/crap   º   Alive magazine   º   SNDH/Tracking

Atari coding BBS
Re: 040/060 detection
Posted by: ggn Sep,10.2016-07:48 


I'm going to assume you mean specific boards for Atari like CT6x or the Afterburner040 here. If yes, firstly you can detect the presence of the CT6x boards by checking for the cookie named 'CT60'.

The answer to cache control usually comes via an extended system API call. Here's an excerpt from the CT60 documentation (I'm sure there's something similar for the AB40, I just don't have any docs handy at the moment):


XBIOS 0xc60c

long ct60_cache(short cache_mode);

This function is used to enable or disable the 68060 caches
in the patched version of General.cpx.

1 enable the caches.
0 disable the caches.
-1 no change.

move.w cache_mode,-(sp)
move.w #$c60c,-(sp)
trap #14
addq.l #4,sp

Return: Returns the contents of the CACR.

Note: For normal programs, the CacheCtrl() function is preferred.


XBIOS 0xc60d

long ct60_flush_cache(void);

This function is used to flush the instruction and data
caches in the patched version of Xcontrol.

move.w #$c60d,-(sp)
trap #14
addq.l #2,sp

Return: ct60_flush_cache returns E_OK (0).

Note: For normal programs, the CacheCtrl() function is preferred.



long CacheCtrl(short OpCode,short Param);

This function is compatible with MilanTOS.

OpCode Param
0 - return 0 to check that function is implemented.
1 - Flush Data Cache.
2 - Flush Instruction Cache.
3 - Flush Data and Instruction Cache.
4 - Inquire data cache mode.
5 mode Set data cache mode, invalidate/flush caches.
6 - Inquire instruction cache mode.
7 mode Set instruction cache mode, invalidate/flush caches.
with mode : 0 = disable / 1 = enable.

move.w Param,-(sp)
move.w OpCode,-(sp)
move.w #160,-(sp)
trap #14
addq.l #6,sp

Return: Inquire value, E_OK (0) or BADRQ (-5) if the OpCode is > 7.

Note: Under the CT60 XBIOS, OpCodes 5/7 have the same effect :
mode : 0 = disable all caches.
1 = enable all caches.
All caches are : Data Cache, Store Buffer, Branch Cache,
Instruction Cache.


That's all fine if you want to be a good citizen. If you don't (for example your code wants to enable/disable/flush caches many times per VBL) you can easily extract the code that controls the caches from the CT6x package itself. (It requires some digging but it's there).

Hope this helps.

P.S. If you want to be system agnostic and just detect 040/060 presence in general you can just fall back to the standard "try to execute a 040 instruction and see if you get an illegal instruction exception" trick.

[All messages in this thread]

Topic Posted by  Date 
040/060 detection MKM/Lamers Sep,09.2016-21:45
  Re: 040/060 detection ggn Sep,10.2016-07:48
    Re: 040/060 detection MKM/Lamers Sep,10.2016-11:14
    Re: 040/060 detection saulot Sep,10.2016-23:43
      Re: 040/060 detection MKM/Lamers Sep,11.2016-10:53
      Re: 040/060 detection mikro Sep,12.2016-00:46

Reply to this message
Human verification (enter the text of the ASCII-art below):

   _   _   _   _  _  _        _  
 _|_ _|_ _|_ _|_ (_)  ) |_|_ / \ 
  |   |   |   |  (_) /_   |  \_/

© 1994-2019 Dead Hackers Society Contact: Anders Eriksson