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CT60 and related things BBS
| Re: SuperVidel installation manual |
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Posted by: Instream
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May,04.2012-14:57
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Hi :)
There are some readable bits in the SV ctrl register (see the Supervidel memory map in our download section) which say if the DVI and/or VGA video pipeline run at 25.175MHz or not, and if the 25.175 and 32MHz clocks from the motherboard are detected. Had to add these registers to see if the VHDL code for auto-selection worked. :)
Before we finally decided that the motherboard clocks are really needed, I had already tried letting the FPGA trigger on the VBL auto vector and try to resync the video pipelines. But since the auto vector can be very inprecise in time (about +-100us IIRC) the monitor went crazy and blackened its screen while resyncing. So we had to ditch that idea.
And HBL syncing was not possible since that auto vector is generally not enabled, IIRC.
So the best solution was to get the real clock signals to the SuperVidel. :)
We have had lots of ideas for freaky blitter modes, and freaky video modes :) The ones that exist are found in the SuperVidel memory map. The other day we had an idea of making a 16bit pixel + 16bit Z-buffer, so each pixel is 32bits wide. The corresponding blitter mode would only put the src pixel data in the dest pixel, if (src.Z) < (dest.Z). This could be used for making 2D games with objects that have real depth, by raytracing the objects to create a Z-axis gradient to be used by the blitter. So you could for example see an object come gradually out of a forest. No approximation of letting the objects be flat in Z is needed anymore :) This mode could also be used for our Reeking Rubber game.
Bu we haven't yet implemented any of this, since there are lots of other things to do right now :P
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