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CT60 and related things BBS
INT are OK ! |
Posted by: Rodolphe
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Jan,15.2012-20:30
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INT are now ok.
I can send an INTA# on PCI bus and see the CT_IRQ output on CPLD to 060.
The 060 INT 6 ACK is here and the VECTOR number programmed into & serviced by the CPLD is OK too. I did several tries and I read well the good vector and the timing is around 10ns marge (insertion of the data vector on bus before TA acknowledge by 060 (the 060 latch the vector number a this moment).
I tried the very last version 2.02b4 with INT from Didier and connected an USB MASS storage device (4GB).
And... it was detected during boot and a 200mA consumption was announced.
No idea how to use it on desktop ;-)
Well, it seems that INT problem is closed.
Except something that I cannot correct : INT PLX line between PLX and CPLD needs a pull-up resistor that I forgot in the design.
Unfortunatelly there is no easy patch that can be done with iron solder except a micro surge operation on the PLX or CPLD pin : I do not recommend to try that!
So, Didier was in current since a long time (!) about that : the PLX INT principal use for him would to be informed (by an INT) for the end of a PLX DMA transfert. Dider has to check the DMAs status registers to see the end of the transfert. Sure this method consumes more CPU time, but we have no other choice !
Now IDE !
Just connecting the logic analyser on the CTPCI IDE port and let's see what happens there ! ;-)
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