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Re: Polling V/H retrace status
Posted by: Patrice Mandin Jul,01.2014-21:39 

I don't think you can read the status. If I am correct, at the hardware level, the video chip is directly wired to IPL 2 (HBL) and 4 (VBL) of the m68k cpu, to trigger interrupts whenever they happen. There are no intermediary registers.







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Topic Posted by  Date 
Polling V/H retrace status PeP Jul,01.2014-07:54
  Re: Polling V/H retrace status ggn Jul,01.2014-08:11
  Re: Polling V/H retrace status Patrice Mandin Jul,01.2014-21:39
    Re: Polling V/H retrace status PeP Jul,02.2014-12:36
      Re: Polling V/H retrace status Patrice Mandin Jul,02.2014-21:33
        Re: Polling V/H retrace status PeP Jul,03.2014-09:00
  Re: Polling V/H retrace status Alien/ST-CNX Jul,02.2014-07:34
    Re: Polling V/H retrace status PeP Jul,02.2014-12:37


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