|
|
Atari coding BBS
| DSP extern memory extra cycles |
|---|
|
Posted by: Sallafranque
|
Jan,03.2012-19:25
|
Hi all,
First, I wish you all a happy new year 2012.
I've got a question about the DSP cycles and external memory :
According to a document from Earx found on Mikro's page (section documents) and called "Some hints on writing applications for the Falcon DSP", I can read the following:
Very important: put all of your code into internal program RAM if possible to
avoid memory wait states. Most programs will fit in the 512 word internal
program RAM. Although the external RAM is zero waitstate, there is a penalty for
accessing it twice in a single instruction, because there is only one external
data bus. The internal buses are all separate however
I agree and understand this, but what is the penalty value (in cycles) for each extra addressing ?
Regards
Laurent
|
[All messages in this thread] [Start new thread]
What's the anti-troll code?
That's your personal code to be able to add comments and messages on the dhs.nu site.
Don't have a code or forgot it? Fix it here.
|
